page . 1 stad-jun.19.2006 PJ06N03D features ? r ds(on) , v gs @10v,i ds @30a=6m ? r ds(on) , v gs @4.5v,i ds @30a=9m ? advanced trench process technology high density cell design for ultra low on-resistance specially designed for dc/dc converters and motor drivers fully characterized avala nche voltage and current in compliance with eu rohs 2002/95/ec directives mechanical data case: to-252 molded plastic terminals : solderable per mil-std-750,method 2026 marking : 06n03d 25v n-channel enhancement mode mosfet maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted ) note: 1. maximum dc current limited by the package 2. surface mounted on fr4 board, t < 10 sec pan jit reserves the right to improve product design,functions and reliability without notice r e t e m a r a pl o b m y st i m i ls t i n u e g a t l o v e c r u o s - n i a r d v s d 5 2v e g a t l o v e c r u o s - e t a g v s g + 0 2v t n e r r u c n i a r d s u o u n i t n o c i d 0 6a t n e r r u c n i a r d d e s l u p ) 1 i m d 0 2 3a n o i t a p i s s i d r e w o p m u m i x a m t a 5 2 = o c t a 5 7 = o c p d 0 7 2 4 w e g n a r e r u t a r e p m e t e g a r o t s d n a n o i t c n u j g n i t a r e p o t j t , g t s 0 5 1 + o t 5 5 - o c e s l u p e l g n i s h t i w y g r e n e e h c n a l a v a h m 5 . 0 = l , v 5 2 = d d v , a 0 4 = d i e s a 0 0 4j m e c n a t s i s e r l a m r e h t e s a c - o t - n o i t c n u j r c j 8 . 1 o w / c ) d e t n u o m b c p ( e c n a t s i s e r l a m r e h t t n e i b m a o t - n o i t c n u j 2 r a j 0 5 o w / c to-252 gate drain source
page . 2 stad-jun.19.2006 PJ06N03D electrical characteristics r e t e m a r a pl o b m y sn o i t i d n o c t s e t. n i m. p y t. x a ms t i n u c i t a t s e g a t l o v n w o d k a e r b e c r u o s - n i a r dv b s s d v s g i , v 0 = d a u 0 5 2 =5 2--v e g a t l o v d l o h s e r h t e t a gv ) h t ( s g v s d v = s g i , d a u 0 5 2 =1-3v e c n a t s i s e r e t a t s - n o e c r u o s - n i a r dr ) n o ( s d v s g i , v 5 . 4 = d a 0 3 =-6 . 70 . 9 m e c n a t s i s e r e t a t s - n o e c r u o s - n i a r dr ) n o ( s d v s g i , v 0 1 = d a 0 3 =-7 . 40 . 6 t n e r r u c n i a r d e g a t l o v e t a g o r e zi s s d v s d v , v 5 2 = s g v 0 =--1a u e g a k a e l y d o b e t a gi s s g v s g =+ v , v 0 2 s d v 0 =--+ 0 0 1a n e c n a t c u d n o c s n a r t d r a w r o fg s f v s d i , v 0 1 = d a 5 1 =0 3--s c i m a n y d e g r a h c e t a g l a t o tq g v s d i , v 5 1 = d v , a 5 1 = s g v 5 =-9 3- c n v s d i , v 5 1 = d a 5 1 = v s g v 0 1 = -2 7- e g r a h c e c r u o s - e t a gq s g -1 . 8- e g r a h c n i a r d - e t a gq d g -2 . 4 1- e m i t y a l e d n o - n r u tt ) n o ( d v d d r , v 5 1 = l 5 1 = i d v , a 1 = n e g v 0 1 = r g 6 . 3 = -2 . 7 11 2 s n e m i t e s i r n o - n r u tt r r -5 17 1 e m i t y a l e d f f o - n r u tt ) f f o ( d -8 70 9 e m i t l l a f f f o - n r u tt f -0 32 4 e c n a t i c a p a c t u p n ic s s i v s d v , v 5 1 = s g v 0 = h m 0 . 1 = f z -0 5 7 3- f p e c n a t i c a p a c t u p t u oc s s o -0 5 6- e c n a t i c a p a c r e f s n a r t e s r e v e rc s s r -0 0 5- e d o i d n i a r d - e c r u o s t n e r r u c d r a w r o f e d o i d . x a mi s ---5 6a e g a t l o v d r a w r o f e d o i dv d s i s v , a 0 3 = s g v 0 =-5 9 . 02 . 1v v dd v out v in r g r l switching test circuit gate charge test circuit v dd v gs r g r l 1ma
page . 3 stad-jun.19.2006 PJ06N03D fig. 1-typical forward characteristic fig.1- output characteristic typical characteristics curves (t =25 c,unless otherwise noted) a o fig.2- transfer characteristic fig.3- on resistance vs drain current fig.4- on resistance vs gate to source voltage fig.5- on resistance vs junction temperature 0 20 40 60 80 012345 v ds - drain-to-source voltage (v) i d - drain-to-source current (a) v =4.0v, 4.5v, 5.0v, 6.0v, 10.0v gs 3.5v 3.0v 2.5v 0 20 40 60 80 11.522.533.544.5 v gs - gate-to-source voltage (v) i d - drain source current (a) t =125 c j o t =25 c j o t =-55 c j o v =10v ds v =10v ds v =10v ds 0 2.5 5 7.5 10 12.5 15 0 102030405060708090 i d - drain current (a) v =10v gs v =4.5v gs r - on-resistance (m ) ds(on) 0 5 10 15 20 25 30 246810 v gs - gate-to-source voltage (v) t =125 c j o t =25 c j o r - on-resistance (m ) ds(on) i =30a d fig.6- capacitance 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) r ds(on) - on-resistance (normalized) v =10v i =30a gs d 0 1000 2000 3000 4000 5000 0 5 10 15 20 25 v ds - drain-to-source voltage (v) c - capacitance (pf) ciss coss crss v =0v f=1mh gs z
page . 4 stad-jun.19.2006 PJ06N03D fig.7 - gate charge waveform fig.9 - threshold voltage vs temperature fig.8 - gate charge fig.10 - breakdown voltage vs junction temperature fig.11 - source-drain diode forward voltage qgd qgs qg qsw vgs(th) vgs qg qg(th) 0 2 4 6 8 10 0 20406080 q g - gate charge (nc) v gs - gate-to-source voltage (v) v =15v i =15a ds d 27 28 29 30 31 32 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) bv dss - breakdown voltage (v) i =250ua d 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) v th - g-s threshold voltage (normalized) i =250ua d 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd - source-to-drain voltage (v) i s - source current (a) v =0v gs t =125 c j o t =25 c j o t =-55 c j o
page . 5 stad-jun.19.2006 mounting pad layout ? packing information t/r - 3k per 13" plastic reel order information legal statement copyright panjit international, inc 2007 the information presented in this document is believed to be accurate and reliable. the specifications and information herein are subject to change without notice. pan jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. pan jit products are not authorized for use in life support devices or systems. pan jit does not convey any license under its patent rights or rights of others. PJ06N03D
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